Hi, I'm
Sudheer Reddy
PHYSICAL DESIGN ENGINEER
An enthusiastic and dedicated final-year Electronics and Communication Engineering student with a solid academic background in circuit design, communication systems, and digital electronics. Passionate about VLSI, software development, and building innovative digital solutions that combine creativity with engineering excellence.
About Me
I am a dedicated final-year Electronics and Communication Engineering student at Vellore Institute of Technology, specializing in VLSI Physical Design, Embedded Systems, and Digital Design. I enjoy combining physical hardware foundations with clean, robust Software Development.
My academic journey is centered around bridging RTL code implementations with concrete hardware architectures. Through structured projects and my internship experiences, I have implemented physical silicon layouts, worked with open-source VLSI toolchains like Qflow, and built hardware sensory networks.
As an active problem solver, I work to design modular solutions that optimize logic layouts and code architectures, preparing to step into roles at the intersection of chip verification and high-performance computing.
My Learning Journey
- Started B.Tech in Electronics & Communication Engineering.
- Learned C Programming fundamentals.
- Built logical thinking and programming basics.
- Learned Java and Object-Oriented Programming.
- Strengthened Data Structures and problem-solving.
- Started working on Arduino-based embedded projects.
- Learned Verilog and SystemVerilog.
- Studied CMOS VLSI fundamentals.
- Learned SPI, I2C, UART, and other communication protocols.
- Completed VLSI Physical Design Internship.
- Worked with Qflow, Yosys, Graywolf, OpenSTA, and QRouter.
- Built hardware and embedded system projects.
- Exploring advanced VLSI Physical Design.
- Improving software development skills.
- Building modern web applications and personal projects.
- Preparing for Software and VLSI career opportunities.
Experience
Maven Silicon
VLSI Physical Design Intern
Technologies & Flow Tools
Key Responsibilities
- Implemented complete RTL to GDSII physical design flow for a Serial Peripheral Interface (SPI).
- Performed logic synthesis and optimization using the Yosys compiler toolchain.
- Executed place & route runs utilizing Graywolf placement and Qrouter routing engines.
- Conducted Static Timing Analysis (STA) with OpenSTA to optimize signal pathways and resolve setup/hold violations.
Internship Achievements
- Generated a fully routed, timing-closed SPI macro layout suitable for manufacturing integration.
- Validated physical integrity using Magic (DRC) and Netgen (LVS) with zero rule violations.
- Gained practical experience applying industry-standard open-source VLSI CAD toolchains.
Technical Skills
Technologies and tools I use to build scalable, modern solutions.
Programming
Frontend
Hardware & VLSI
Tools
Featured Projects
Premium software and hardware engineering work.
Let's Connect
I'm currently available for freelance projects and full-time opportunities. If you have a project that needs some creative magic, I'd love to hear about it.